1. Field of the Invention
This invention relates to the field of data processing systems. More particularly, this invention relates to mechanisms for interpreting program instructions into data processing operations within data processing systems.
2. Description of the Prior Art
It is known to provide data processing systems using interpreted program instructions. An example of program instructions that may require interpretation are Java bytecodes. These Java bytecodes typically require interpretation into one or more native instructions of a target processor core. The interpretation may generate the native instructions or control signals equivalent to the native instructions.
A problem that arises is that different Java Virtual Machines may choose differing mappings between at least some of the bytecodes that form program instructions and the data processing operations being represented. This is allowed for in the Java architecture in that a block of configurable bytecodes is provided, such as for use to represent resolved quick forms of desired instructions. There is an inherent difficulty between a desire to provide hardware mechanisms for interpreting such bytecodes and the variability of the bytecode mappings that may need representing for different Java Virtual Machines. In particular, it is strongly undesirable to need to provide different hardware for each different Java Virtual Machine.
One way of dealing with the above problem might be to use a software interpreter for any Java bytecode that does not have a fixed mapping. Whilst this does provide a working solution, it introduces a significant performance degradation since software interpretation of the programmable quick form program instructions introduces a significant slowing of what are performance critical instructions.